[−][src]Trait drone_stm32_map_periph_gpio::pin::GpioAfrAfr

pub trait GpioAfrAfr: GpioAfr {
    type UGpioAfrAfr: RegField<Urt, Reg = Self::UGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + URwRwRegFieldBits;
    type SGpioAfrAfr: RegField<Srt, Reg = Self::SGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + SRwRwRegFieldBits;
    type CGpioAfrAfr: RegField<Crt, Reg = Self::CGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + CRwRwRegFieldBits;
}

Associated Types

`type UGpioAfrAfr: RegField<Urt, Reg = Self::UGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + URwRwRegFieldBits`

`type SGpioAfrAfr: RegField<Srt, Reg = Self::SGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + SRwRwRegFieldBits`

`type CGpioAfrAfr: RegField<Crt, Reg = Self::CGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + CRwRwRegFieldBits`

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Implementors

`impl GpioAfrAfr for GpioA0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioA1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioA10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioA11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioA12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioA13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioA14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioA15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioA2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioA3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioA4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioA5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioA6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioA7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioA8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioA9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioB0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioB1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioB10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioB11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioB12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioB13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioB14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioB15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioB2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioB3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioB4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioB5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioB6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioB7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioB8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioB9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioC0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioC1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioC10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioC11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioC12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioC13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioC14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioC15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioC2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioC3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioC4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioC5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioC6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioC7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioC8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioC9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioD0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioD1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioD10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioD11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioD12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioD13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioD14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioD15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioD2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioD3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioD4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioD5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioD6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioD7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioD8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioD9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioE0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioE1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioE10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioE11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioE12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioE13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioE14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioE15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioE2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioE3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioE4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioE5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioE6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioE7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioE8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioE9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioF0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioF1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioF10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioF11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioF12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioF13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioF14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioF15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioF2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioF3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioF4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioF5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioF6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioF7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioF8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioF9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioG0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioG1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioG10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioG11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioG12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioG13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioG14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioG15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioG2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioG3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioG4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioG5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioG6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioG7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioG8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioG9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioH0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioH1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioH10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioH11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioH12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioH13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioH14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioH15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioH2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioH3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioH4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioH5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioH6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioH7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioH8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioH9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioI0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioI1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioI10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioI11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioI12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioI13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioI14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioI15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioI2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioI3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioI4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioI5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioI6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioI7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioI8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioI9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

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[−][src]Trait drone_stm32_map_periph_gpio::pin::GpioAfrAfr

Associated Types

type UGpioAfrAfr: RegField<Urt, Reg = Self::UGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + URwRwRegFieldBits

type SGpioAfrAfr: RegField<Srt, Reg = Self::SGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + SRwRwRegFieldBits

type CGpioAfrAfr: RegField<Crt, Reg = Self::CGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + CRwRwRegFieldBits

Implementors

impl GpioAfrAfr for GpioA0[src]

type UGpioAfrAfr = Afrl0<Urt>

type SGpioAfrAfr = Afrl0<Srt>

type CGpioAfrAfr = Afrl0<Crt>

impl GpioAfrAfr for GpioA1[src]

type UGpioAfrAfr = Afrl1<Urt>

type SGpioAfrAfr = Afrl1<Srt>

type CGpioAfrAfr = Afrl1<Crt>

impl GpioAfrAfr for GpioA10[src]

type UGpioAfrAfr = Afrh10<Urt>

type SGpioAfrAfr = Afrh10<Srt>

type CGpioAfrAfr = Afrh10<Crt>

impl GpioAfrAfr for GpioA11[src]

type UGpioAfrAfr = Afrh11<Urt>

type SGpioAfrAfr = Afrh11<Srt>

type CGpioAfrAfr = Afrh11<Crt>

impl GpioAfrAfr for GpioA12[src]

type UGpioAfrAfr = Afrh12<Urt>

type SGpioAfrAfr = Afrh12<Srt>

type CGpioAfrAfr = Afrh12<Crt>

impl GpioAfrAfr for GpioA13[src]

type UGpioAfrAfr = Afrh13<Urt>

type SGpioAfrAfr = Afrh13<Srt>

type CGpioAfrAfr = Afrh13<Crt>

impl GpioAfrAfr for GpioA14[src]

type UGpioAfrAfr = Afrh14<Urt>

type SGpioAfrAfr = Afrh14<Srt>

type CGpioAfrAfr = Afrh14<Crt>

impl GpioAfrAfr for GpioA15[src]

type UGpioAfrAfr = Afrh15<Urt>

type SGpioAfrAfr = Afrh15<Srt>

type CGpioAfrAfr = Afrh15<Crt>

impl GpioAfrAfr for GpioA2[src]

type UGpioAfrAfr = Afrl2<Urt>

type SGpioAfrAfr = Afrl2<Srt>

type CGpioAfrAfr = Afrl2<Crt>

impl GpioAfrAfr for GpioA3[src]

type UGpioAfrAfr = Afrl3<Urt>

type SGpioAfrAfr = Afrl3<Srt>

type CGpioAfrAfr = Afrl3<Crt>

impl GpioAfrAfr for GpioA4[src]

type UGpioAfrAfr = Afrl4<Urt>

type SGpioAfrAfr = Afrl4<Srt>

type CGpioAfrAfr = Afrl4<Crt>

impl GpioAfrAfr for GpioA5[src]

type UGpioAfrAfr = Afrl5<Urt>

type SGpioAfrAfr = Afrl5<Srt>

type CGpioAfrAfr = Afrl5<Crt>

impl GpioAfrAfr for GpioA6[src]

type UGpioAfrAfr = Afrl6<Urt>

type SGpioAfrAfr = Afrl6<Srt>

type CGpioAfrAfr = Afrl6<Crt>

impl GpioAfrAfr for GpioA7[src]

type UGpioAfrAfr = Afrl7<Urt>

type SGpioAfrAfr = Afrl7<Srt>

type CGpioAfrAfr = Afrl7<Crt>

impl GpioAfrAfr for GpioA8[src]

type UGpioAfrAfr = Afrh8<Urt>

type SGpioAfrAfr = Afrh8<Srt>

type CGpioAfrAfr = Afrh8<Crt>

impl GpioAfrAfr for GpioA9[src]

type UGpioAfrAfr = Afrh9<Urt>

type SGpioAfrAfr = Afrh9<Srt>

type CGpioAfrAfr = Afrh9<Crt>

impl GpioAfrAfr for GpioB0[src]

type UGpioAfrAfr = Afrl0<Urt>

type SGpioAfrAfr = Afrl0<Srt>

type CGpioAfrAfr = Afrl0<Crt>

impl GpioAfrAfr for GpioB1[src]

type UGpioAfrAfr = Afrl1<Urt>

type SGpioAfrAfr = Afrl1<Srt>

type CGpioAfrAfr = Afrl1<Crt>

impl GpioAfrAfr for GpioB10[src]

type UGpioAfrAfr = Afrh10<Urt>

`type UGpioAfrAfr: RegField<Urt, Reg = Self::UGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + URwRwRegFieldBits`

`type SGpioAfrAfr: RegField<Srt, Reg = Self::SGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + SRwRwRegFieldBits`

`type CGpioAfrAfr: RegField<Crt, Reg = Self::CGpioAfr, URegField = Self::UGpioAfrAfr, SRegField = Self::SGpioAfrAfr, CRegField = Self::CGpioAfrAfr> + CRwRwRegFieldBits`

`impl GpioAfrAfr for GpioA0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioA1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioA10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioA11`[src]

`type UGpioAfrAfr = Afrh11<Urt>`

`type SGpioAfrAfr = Afrh11<Srt>`

`type CGpioAfrAfr = Afrh11<Crt>`

`impl GpioAfrAfr for GpioA12`[src]

`type UGpioAfrAfr = Afrh12<Urt>`

`type SGpioAfrAfr = Afrh12<Srt>`

`type CGpioAfrAfr = Afrh12<Crt>`

`impl GpioAfrAfr for GpioA13`[src]

`type UGpioAfrAfr = Afrh13<Urt>`

`type SGpioAfrAfr = Afrh13<Srt>`

`type CGpioAfrAfr = Afrh13<Crt>`

`impl GpioAfrAfr for GpioA14`[src]

`type UGpioAfrAfr = Afrh14<Urt>`

`type SGpioAfrAfr = Afrh14<Srt>`

`type CGpioAfrAfr = Afrh14<Crt>`

`impl GpioAfrAfr for GpioA15`[src]

`type UGpioAfrAfr = Afrh15<Urt>`

`type SGpioAfrAfr = Afrh15<Srt>`

`type CGpioAfrAfr = Afrh15<Crt>`

`impl GpioAfrAfr for GpioA2`[src]

`type UGpioAfrAfr = Afrl2<Urt>`

`type SGpioAfrAfr = Afrl2<Srt>`

`type CGpioAfrAfr = Afrl2<Crt>`

`impl GpioAfrAfr for GpioA3`[src]

`type UGpioAfrAfr = Afrl3<Urt>`

`type SGpioAfrAfr = Afrl3<Srt>`

`type CGpioAfrAfr = Afrl3<Crt>`

`impl GpioAfrAfr for GpioA4`[src]

`type UGpioAfrAfr = Afrl4<Urt>`

`type SGpioAfrAfr = Afrl4<Srt>`

`type CGpioAfrAfr = Afrl4<Crt>`

`impl GpioAfrAfr for GpioA5`[src]

`type UGpioAfrAfr = Afrl5<Urt>`

`type SGpioAfrAfr = Afrl5<Srt>`

`type CGpioAfrAfr = Afrl5<Crt>`

`impl GpioAfrAfr for GpioA6`[src]

`type UGpioAfrAfr = Afrl6<Urt>`

`type SGpioAfrAfr = Afrl6<Srt>`

`type CGpioAfrAfr = Afrl6<Crt>`

`impl GpioAfrAfr for GpioA7`[src]

`type UGpioAfrAfr = Afrl7<Urt>`

`type SGpioAfrAfr = Afrl7<Srt>`

`type CGpioAfrAfr = Afrl7<Crt>`

`impl GpioAfrAfr for GpioA8`[src]

`type UGpioAfrAfr = Afrh8<Urt>`

`type SGpioAfrAfr = Afrh8<Srt>`

`type CGpioAfrAfr = Afrh8<Crt>`

`impl GpioAfrAfr for GpioA9`[src]

`type UGpioAfrAfr = Afrh9<Urt>`

`type SGpioAfrAfr = Afrh9<Srt>`

`type CGpioAfrAfr = Afrh9<Crt>`

`impl GpioAfrAfr for GpioB0`[src]

`type UGpioAfrAfr = Afrl0<Urt>`

`type SGpioAfrAfr = Afrl0<Srt>`

`type CGpioAfrAfr = Afrl0<Crt>`

`impl GpioAfrAfr for GpioB1`[src]

`type UGpioAfrAfr = Afrl1<Urt>`

`type SGpioAfrAfr = Afrl1<Srt>`

`type CGpioAfrAfr = Afrl1<Crt>`

`impl GpioAfrAfr for GpioB10`[src]

`type UGpioAfrAfr = Afrh10<Urt>`

`type SGpioAfrAfr = Afrh10<Srt>`

`type CGpioAfrAfr = Afrh10<Crt>`

`impl GpioAfrAfr for GpioB11`[src]