Struct drone_cortexm::map::reg::scb::aircr::Reg [−][src]
Application interrupt and reset control register.
Fields
vectkey: Vectkey<_T>
Vector Key.
Register writes must write 0x05FA
to this field, otherwise the write
is ignored.
On reads, returns 0xFA05
.
endianess: Endianess<_T>
Data endianness bit.
prigroup: Prigroup<_T>
Interrupt priority grouping field.
sysresetreq: Sysresetreq<_T>
System reset request.
vectclractive: Vectclractive<_T>
Clears all active state information for exceptions.
vectreset: Vectreset<_T>
Resets the processor (except debug logic), but this will not reset circuits outside the processor.
Trait Implementations
impl<_T: Clone + RegTag> Clone for Reg<_T>
[src][+]
impl<_T: Copy + RegTag> Copy for Reg<_T>
[src]
impl<_T: RegTag> RReg<_T> for Reg<_T>
[src][+]
impl<_T: RegTag> Reg<_T> for Reg<_T>
[src][+]
impl<'a, _T> RegHold<'a, _T, Reg<_T>> for Hold<'a, _T> where
_T: RegTag,
[src][+]
_T: RegTag,
impl<'a, _T> RegRef<'a, _T> for Reg<_T> where
_T: RegTag + 'a,
[src][+]
_T: RegTag + 'a,
impl<_T: RegTag> Token for Reg<_T>
[src][+]
impl<_T: RegTag> WReg<_T> for Reg<_T>
[src][+]
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
[src][+]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
[src][+]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src][+]
T: ?Sized,
impl<R> CRwReg for R where
R: CRwReg + for<'a> RwRegAtomic<'a, Crt>,
[src]
R: CRwReg + for<'a> RwRegAtomic<'a, Crt>,
impl<R> CRwReg for R where
R: RwReg<Crt> + for<'a> WRegAtomic<'a, Crt> + Copy,
[src]
R: RwReg<Crt> + for<'a> WRegAtomic<'a, Crt> + Copy,
impl<T> From<T> for T
[src][+]
impl<T, U> Into<U> for T where
U: From<T>,
[src][+]
U: From<T>,
impl<R, T> RwReg<T> for R where
T: RegTag,
R: RReg<T> + WReg<T>,
[src]
T: RegTag,
R: RReg<T> + WReg<T>,
impl<'a, R> RwRegUnsync<'a> for R where
R: RReg<Urt> + WRegUnsync<'a> + RegRef<'a, Urt>,
[src][+]
R: RReg<Urt> + WRegUnsync<'a> + RegRef<'a, Urt>,
impl<R> SRwReg for R where
R: SRwReg + for<'a> RwRegAtomic<'a, Srt>,
[src]
R: SRwReg + for<'a> RwRegAtomic<'a, Srt>,
impl<R> SRwReg for R where
R: RwReg<Srt> + for<'a> WRegAtomic<'a, Srt>,
[src]
R: RwReg<Srt> + for<'a> WRegAtomic<'a, Srt>,
impl<T> Same<T> for T
[src]
type Output = T
Should always be Self
impl<T> ToOwned for T where
T: Clone,
[src][+]
T: Clone,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src][+]
U: Into<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src][+]
U: TryFrom<T>,
impl<R> URwReg for R where
R: RwReg<Urt> + for<'a> RwRegUnsync<'a>,
[src]
R: RwReg<Urt> + for<'a> RwRegUnsync<'a>,
impl<'a, R> WRegUnsync<'a> for R where
R: WReg<Urt> + RegRef<'a, Urt>,
[src][+]
R: WReg<Urt> + RegRef<'a, Urt>,