Module drone_cortexm::map::reg::scb [−][src]
System control block.
Modules
| afsr | Auxiliary Fault Status Register. |
| aircr | Application interrupt and reset control register. |
| bfar | BusFault Address Register. |
| bfsr | BusFault Status Register. |
| ccr | Configuration and control register. |
| cpuid | Provides identification information for the processor. |
| demcr | Debug Exception and Monitor Control Register. |
| dfsr | Debug Fault Status Register. |
| hfsr | HardFault Status Register. |
| icsr | Provides software control of the NMI, PendSV, and SysTick exceptions, and provides interrupt status information. |
| mmfar | MemManage Fault Address Register. |
| mmfsr | MemManage Status Register. |
| scr | System control register. |
| shcsr | System handler control and state register. |
| shpr1 | System handler priority register 1. |
| shpr2 | System handler priority register 2. |
| shpr3 | System handler priority register 3. |
| ufsr | UsageFault Status Register. |
| vtor | Holds the vector table address. |
Structs
| Afsr | Auxiliary Fault Status Register. |
| Aircr | Application interrupt and reset control register. |
| Bfar | BusFault Address Register. |
| Bfsr | BusFault Status Register. |
| Ccr | Configuration and control register. |
| Cpuid | Provides identification information for the processor. |
| Demcr | Debug Exception and Monitor Control Register. |
| Dfsr | Debug Fault Status Register. |
| Hfsr | HardFault Status Register. |
| Icsr | Provides software control of the NMI, PendSV, and SysTick exceptions, and provides interrupt status information. |
| Mmfar | MemManage Fault Address Register. |
| Mmfsr | MemManage Status Register. |
| Scr | System control register. |
| Shcsr | System handler control and state register. |
| Shpr1 | System handler priority register 1. |
| Shpr2 | System handler priority register 2. |
| Shpr3 | System handler priority register 3. |
| Ufsr | UsageFault Status Register. |
| Vtor | Holds the vector table address. |