Struct drone_cortexm::map::reg::scb::bfsr::Hold [−][src]
BusFault Status Register.
Implementations
impl<'a, _T: RegTag> Hold<'a, _T>
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impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_bfarvalid(&mut self) -> &mut Self
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BFAR has valid contents.
pub fn clear_bfarvalid(&mut self) -> &mut Self
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BFAR has valid contents.
pub fn toggle_bfarvalid(&mut self) -> &mut Self
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BFAR has valid contents.
impl<'a, _T: RegTag> Hold<'a, _T>
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impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_lsperr(&mut self) -> &mut Self
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A bus fault occurred during FP lazy state preservation.
pub fn clear_lsperr(&mut self) -> &mut Self
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A bus fault occurred during FP lazy state preservation.
pub fn toggle_lsperr(&mut self) -> &mut Self
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A bus fault occurred during FP lazy state preservation.
impl<'a, _T: RegTag> Hold<'a, _T>
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impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_stkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception entry.
pub fn clear_stkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception entry.
pub fn toggle_stkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception entry.
impl<'a, _T: RegTag> Hold<'a, _T>
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impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_unstkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception return.
pub fn clear_unstkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception return.
pub fn toggle_unstkerr(&mut self) -> &mut Self
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A derived bus fault has occurred on exception return.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn impreciserr(&self) -> bool
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Imprecise data access error has occurred.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_impreciserr(&mut self) -> &mut Self
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Imprecise data access error has occurred.
pub fn clear_impreciserr(&mut self) -> &mut Self
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Imprecise data access error has occurred.
pub fn toggle_impreciserr(&mut self) -> &mut Self
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Imprecise data access error has occurred.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn preciserr(&self) -> bool
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A precise data access error has occurred, and the processor has written the faulting address to the BFAR.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_preciserr(&mut self) -> &mut Self
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A precise data access error has occurred, and the processor has written the faulting address to the BFAR.
pub fn clear_preciserr(&mut self) -> &mut Self
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A precise data access error has occurred, and the processor has written the faulting address to the BFAR.
pub fn toggle_preciserr(&mut self) -> &mut Self
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A precise data access error has occurred, and the processor has written the faulting address to the BFAR.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn ibuserr(&self) -> bool
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A bus fault on an instruction prefetch has occurred. The fault is signaled only if the instruction is issued.
impl<'a, _T: RegTag> Hold<'a, _T>
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pub fn set_ibuserr(&mut self) -> &mut Self
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A bus fault on an instruction prefetch has occurred. The fault is signaled only if the instruction is issued.
pub fn clear_ibuserr(&mut self) -> &mut Self
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A bus fault on an instruction prefetch has occurred. The fault is signaled only if the instruction is issued.
pub fn toggle_ibuserr(&mut self) -> &mut Self
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A bus fault on an instruction prefetch has occurred. The fault is signaled only if the instruction is issued.
Trait Implementations
Auto Trait Implementations
impl<'a, _T> Send for Hold<'a, _T>
impl<'a, _T> Sync for Hold<'a, _T>
impl<'a, _T> Unpin for Hold<'a, _T>
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> Same<T> for T
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type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,