[−][src]Struct drone_stm32_map_periph_uart::SUartCr1Fields
Fields
cmie: T::SUartCr1Cmie
deat0: T::SUartCr1Deat0
deat1: T::SUartCr1Deat1
deat2: T::SUartCr1Deat2
deat3: T::SUartCr1Deat3
deat4: T::SUartCr1Deat4
dedt0: T::SUartCr1Dedt0
dedt1: T::SUartCr1Dedt1
dedt2: T::SUartCr1Dedt2
dedt3: T::SUartCr1Dedt3
dedt4: T::SUartCr1Dedt4
eobie: T::SUartCr1EobieOpt
idleie: T::SUartCr1Idleie
m0: T::SUartCr1M0
m1: T::SUartCr1M1
mme: T::SUartCr1Mme
over8: T::SUartCr1Over8Opt
pce: T::SUartCr1Pce
peie: T::SUartCr1Peie
ps: T::SUartCr1Ps
re: T::SUartCr1Re
rtoie: T::SUartCr1RtoieOpt
rxneie: T::SUartCr1Rxneie
tcie: T::SUartCr1Tcie
te: T::SUartCr1Te
txeie: T::SUartCr1Txeie
ue: T::SUartCr1Ue
uesm: T::SUartCr1Uesm
wake: T::SUartCr1Wake
Auto Trait Implementations
impl<T> Unpin for SUartCr1Fields<T> where
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Unpin,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Unpin,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Unpin,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Unpin,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Unpin,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Unpin,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Unpin,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Unpin,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Unpin,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Unpin,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Unpin,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Unpin,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Unpin,
<T as UartCr1M0<T>>::SUartCr1M0: Unpin,
<T as UartCr1M1<T>>::SUartCr1M1: Unpin,
<T as UartCr1Mme<T>>::SUartCr1Mme: Unpin,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Unpin,
<T as UartCr1Pce<T>>::SUartCr1Pce: Unpin,
<T as UartCr1Peie<T>>::SUartCr1Peie: Unpin,
<T as UartCr1Ps<T>>::SUartCr1Ps: Unpin,
<T as UartCr1Re<T>>::SUartCr1Re: Unpin,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Unpin,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Unpin,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Unpin,
<T as UartCr1Te<T>>::SUartCr1Te: Unpin,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Unpin,
<T as UartCr1Ue<T>>::SUartCr1Ue: Unpin,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Unpin,
<T as UartCr1Wake<T>>::SUartCr1Wake: Unpin,
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Unpin,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Unpin,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Unpin,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Unpin,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Unpin,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Unpin,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Unpin,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Unpin,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Unpin,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Unpin,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Unpin,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Unpin,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Unpin,
<T as UartCr1M0<T>>::SUartCr1M0: Unpin,
<T as UartCr1M1<T>>::SUartCr1M1: Unpin,
<T as UartCr1Mme<T>>::SUartCr1Mme: Unpin,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Unpin,
<T as UartCr1Pce<T>>::SUartCr1Pce: Unpin,
<T as UartCr1Peie<T>>::SUartCr1Peie: Unpin,
<T as UartCr1Ps<T>>::SUartCr1Ps: Unpin,
<T as UartCr1Re<T>>::SUartCr1Re: Unpin,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Unpin,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Unpin,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Unpin,
<T as UartCr1Te<T>>::SUartCr1Te: Unpin,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Unpin,
<T as UartCr1Ue<T>>::SUartCr1Ue: Unpin,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Unpin,
<T as UartCr1Wake<T>>::SUartCr1Wake: Unpin,
impl<T> Send for SUartCr1Fields<T> where
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Send,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Send,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Send,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Send,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Send,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Send,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Send,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Send,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Send,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Send,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Send,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Send,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Send,
<T as UartCr1M0<T>>::SUartCr1M0: Send,
<T as UartCr1M1<T>>::SUartCr1M1: Send,
<T as UartCr1Mme<T>>::SUartCr1Mme: Send,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Send,
<T as UartCr1Pce<T>>::SUartCr1Pce: Send,
<T as UartCr1Peie<T>>::SUartCr1Peie: Send,
<T as UartCr1Ps<T>>::SUartCr1Ps: Send,
<T as UartCr1Re<T>>::SUartCr1Re: Send,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Send,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Send,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Send,
<T as UartCr1Te<T>>::SUartCr1Te: Send,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Send,
<T as UartCr1Ue<T>>::SUartCr1Ue: Send,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Send,
<T as UartCr1Wake<T>>::SUartCr1Wake: Send,
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Send,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Send,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Send,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Send,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Send,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Send,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Send,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Send,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Send,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Send,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Send,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Send,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Send,
<T as UartCr1M0<T>>::SUartCr1M0: Send,
<T as UartCr1M1<T>>::SUartCr1M1: Send,
<T as UartCr1Mme<T>>::SUartCr1Mme: Send,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Send,
<T as UartCr1Pce<T>>::SUartCr1Pce: Send,
<T as UartCr1Peie<T>>::SUartCr1Peie: Send,
<T as UartCr1Ps<T>>::SUartCr1Ps: Send,
<T as UartCr1Re<T>>::SUartCr1Re: Send,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Send,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Send,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Send,
<T as UartCr1Te<T>>::SUartCr1Te: Send,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Send,
<T as UartCr1Ue<T>>::SUartCr1Ue: Send,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Send,
<T as UartCr1Wake<T>>::SUartCr1Wake: Send,
impl<T> Sync for SUartCr1Fields<T> where
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Sync,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Sync,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Sync,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Sync,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Sync,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Sync,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Sync,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Sync,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Sync,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Sync,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Sync,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Sync,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Sync,
<T as UartCr1M0<T>>::SUartCr1M0: Sync,
<T as UartCr1M1<T>>::SUartCr1M1: Sync,
<T as UartCr1Mme<T>>::SUartCr1Mme: Sync,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Sync,
<T as UartCr1Pce<T>>::SUartCr1Pce: Sync,
<T as UartCr1Peie<T>>::SUartCr1Peie: Sync,
<T as UartCr1Ps<T>>::SUartCr1Ps: Sync,
<T as UartCr1Re<T>>::SUartCr1Re: Sync,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Sync,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Sync,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Sync,
<T as UartCr1Te<T>>::SUartCr1Te: Sync,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Sync,
<T as UartCr1Ue<T>>::SUartCr1Ue: Sync,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Sync,
<T as UartCr1Wake<T>>::SUartCr1Wake: Sync,
<T as UartCr1Cmie<T>>::SUartCr1Cmie: Sync,
<T as UartCr1Deat0<T>>::SUartCr1Deat0: Sync,
<T as UartCr1Deat1<T>>::SUartCr1Deat1: Sync,
<T as UartCr1Deat2<T>>::SUartCr1Deat2: Sync,
<T as UartCr1Deat3<T>>::SUartCr1Deat3: Sync,
<T as UartCr1Deat4<T>>::SUartCr1Deat4: Sync,
<T as UartCr1Dedt0<T>>::SUartCr1Dedt0: Sync,
<T as UartCr1Dedt1<T>>::SUartCr1Dedt1: Sync,
<T as UartCr1Dedt2<T>>::SUartCr1Dedt2: Sync,
<T as UartCr1Dedt3<T>>::SUartCr1Dedt3: Sync,
<T as UartCr1Dedt4<T>>::SUartCr1Dedt4: Sync,
<T as UartCr1EobieOpt<T>>::SUartCr1EobieOpt: Sync,
<T as UartCr1Idleie<T>>::SUartCr1Idleie: Sync,
<T as UartCr1M0<T>>::SUartCr1M0: Sync,
<T as UartCr1M1<T>>::SUartCr1M1: Sync,
<T as UartCr1Mme<T>>::SUartCr1Mme: Sync,
<T as UartCr1Over8Opt<T>>::SUartCr1Over8Opt: Sync,
<T as UartCr1Pce<T>>::SUartCr1Pce: Sync,
<T as UartCr1Peie<T>>::SUartCr1Peie: Sync,
<T as UartCr1Ps<T>>::SUartCr1Ps: Sync,
<T as UartCr1Re<T>>::SUartCr1Re: Sync,
<T as UartCr1RtoieOpt<T>>::SUartCr1RtoieOpt: Sync,
<T as UartCr1Rxneie<T>>::SUartCr1Rxneie: Sync,
<T as UartCr1Tcie<T>>::SUartCr1Tcie: Sync,
<T as UartCr1Te<T>>::SUartCr1Te: Sync,
<T as UartCr1Txeie<T>>::SUartCr1Txeie: Sync,
<T as UartCr1Ue<T>>::SUartCr1Ue: Sync,
<T as UartCr1Uesm<T>>::SUartCr1Uesm: Sync,
<T as UartCr1Wake<T>>::SUartCr1Wake: Sync,
Blanket Implementations
impl<T> From<T> for T
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impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,