pub trait GpioLckrLck5<T: GpioPortMap>: GpioLckr<T> {
type UGpioLckrLck5: RegField<Urt, Reg = Self::UGpioLckr, URegField = Self::UGpioLckrLck5, SRegField = Self::SGpioLckrLck5, CRegField = Self::CGpioLckrLck5> + URwRwRegFieldBit;
type SGpioLckrLck5: RegField<Srt, Reg = Self::SGpioLckr, URegField = Self::UGpioLckrLck5, SRegField = Self::SGpioLckrLck5, CRegField = Self::CGpioLckrLck5> + SRwRwRegFieldBit;
type CGpioLckrLck5: RegField<Crt, Reg = Self::CGpioLckr, URegField = Self::UGpioLckrLck5, SRegField = Self::SGpioLckrLck5, CRegField = Self::CGpioLckrLck5> + CRwRwRegFieldBit;
}