pub trait GpioLckrLck4<T: GpioPortMap>: GpioLckr<T> {
type UGpioLckrLck4: RegField<Urt, Reg = Self::UGpioLckr, URegField = Self::UGpioLckrLck4, SRegField = Self::SGpioLckrLck4, CRegField = Self::CGpioLckrLck4> + URwRwRegFieldBit;
type SGpioLckrLck4: RegField<Srt, Reg = Self::SGpioLckr, URegField = Self::UGpioLckrLck4, SRegField = Self::SGpioLckrLck4, CRegField = Self::CGpioLckrLck4> + SRwRwRegFieldBit;
type CGpioLckrLck4: RegField<Crt, Reg = Self::CGpioLckr, URegField = Self::UGpioLckrLck4, SRegField = Self::SGpioLckrLck4, CRegField = Self::CGpioLckrLck4> + CRwRwRegFieldBit;
}