pub trait GpioLckrLck0<T: GpioPortMap>: GpioLckr<T> {
type UGpioLckrLck0: RegField<Urt, Reg = Self::UGpioLckr, URegField = Self::UGpioLckrLck0, SRegField = Self::SGpioLckrLck0, CRegField = Self::CGpioLckrLck0> + URwRwRegFieldBit;
type SGpioLckrLck0: RegField<Srt, Reg = Self::SGpioLckr, URegField = Self::UGpioLckrLck0, SRegField = Self::SGpioLckrLck0, CRegField = Self::CGpioLckrLck0> + SRwRwRegFieldBit;
type CGpioLckrLck0: RegField<Crt, Reg = Self::CGpioLckr, URegField = Self::UGpioLckrLck0, SRegField = Self::SGpioLckrLck0, CRegField = Self::CGpioLckrLck0> + CRwRwRegFieldBit;
}