pub trait GpioIdrIdr9<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr9: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr9, SRegField = Self::SGpioIdrIdr9, CRegField = Self::CGpioIdrIdr9> + URoRoRegFieldBit;
type SGpioIdrIdr9: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr9, SRegField = Self::SGpioIdrIdr9, CRegField = Self::CGpioIdrIdr9> + SRoRoRegFieldBit;
type CGpioIdrIdr9: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr9, SRegField = Self::SGpioIdrIdr9, CRegField = Self::CGpioIdrIdr9> + CRoRoRegFieldBit;
}