pub trait GpioIdrIdr7<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr7: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr7, SRegField = Self::SGpioIdrIdr7, CRegField = Self::CGpioIdrIdr7> + URoRoRegFieldBit;
type SGpioIdrIdr7: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr7, SRegField = Self::SGpioIdrIdr7, CRegField = Self::CGpioIdrIdr7> + SRoRoRegFieldBit;
type CGpioIdrIdr7: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr7, SRegField = Self::SGpioIdrIdr7, CRegField = Self::CGpioIdrIdr7> + CRoRoRegFieldBit;
}