pub trait GpioIdrIdr4<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr4: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr4, SRegField = Self::SGpioIdrIdr4, CRegField = Self::CGpioIdrIdr4> + URoRoRegFieldBit;
type SGpioIdrIdr4: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr4, SRegField = Self::SGpioIdrIdr4, CRegField = Self::CGpioIdrIdr4> + SRoRoRegFieldBit;
type CGpioIdrIdr4: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr4, SRegField = Self::SGpioIdrIdr4, CRegField = Self::CGpioIdrIdr4> + CRoRoRegFieldBit;
}