pub trait GpioIdrIdr3<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr3: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr3, SRegField = Self::SGpioIdrIdr3, CRegField = Self::CGpioIdrIdr3> + URoRoRegFieldBit;
type SGpioIdrIdr3: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr3, SRegField = Self::SGpioIdrIdr3, CRegField = Self::CGpioIdrIdr3> + SRoRoRegFieldBit;
type CGpioIdrIdr3: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr3, SRegField = Self::SGpioIdrIdr3, CRegField = Self::CGpioIdrIdr3> + CRoRoRegFieldBit;
}