pub trait GpioIdrIdr2<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr2: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr2, SRegField = Self::SGpioIdrIdr2, CRegField = Self::CGpioIdrIdr2> + URoRoRegFieldBit;
type SGpioIdrIdr2: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr2, SRegField = Self::SGpioIdrIdr2, CRegField = Self::CGpioIdrIdr2> + SRoRoRegFieldBit;
type CGpioIdrIdr2: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr2, SRegField = Self::SGpioIdrIdr2, CRegField = Self::CGpioIdrIdr2> + CRoRoRegFieldBit;
}