pub trait GpioIdrIdr12<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr12: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr12, SRegField = Self::SGpioIdrIdr12, CRegField = Self::CGpioIdrIdr12> + URoRoRegFieldBit;
type SGpioIdrIdr12: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr12, SRegField = Self::SGpioIdrIdr12, CRegField = Self::CGpioIdrIdr12> + SRoRoRegFieldBit;
type CGpioIdrIdr12: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr12, SRegField = Self::SGpioIdrIdr12, CRegField = Self::CGpioIdrIdr12> + CRoRoRegFieldBit;
}