pub trait GpioIdrIdr10<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr10: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr10, SRegField = Self::SGpioIdrIdr10, CRegField = Self::CGpioIdrIdr10> + URoRoRegFieldBit;
type SGpioIdrIdr10: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr10, SRegField = Self::SGpioIdrIdr10, CRegField = Self::CGpioIdrIdr10> + SRoRoRegFieldBit;
type CGpioIdrIdr10: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr10, SRegField = Self::SGpioIdrIdr10, CRegField = Self::CGpioIdrIdr10> + CRoRoRegFieldBit;
}