pub trait GpioIdrIdr1<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr1: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr1, SRegField = Self::SGpioIdrIdr1, CRegField = Self::CGpioIdrIdr1> + URoRoRegFieldBit;
type SGpioIdrIdr1: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr1, SRegField = Self::SGpioIdrIdr1, CRegField = Self::CGpioIdrIdr1> + SRoRoRegFieldBit;
type CGpioIdrIdr1: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr1, SRegField = Self::SGpioIdrIdr1, CRegField = Self::CGpioIdrIdr1> + CRoRoRegFieldBit;
}