pub trait GpioIdrIdr0<T: GpioPortMap>: GpioIdr<T> {
type UGpioIdrIdr0: RegField<Urt, Reg = Self::UGpioIdr, URegField = Self::UGpioIdrIdr0, SRegField = Self::SGpioIdrIdr0, CRegField = Self::CGpioIdrIdr0> + URoRoRegFieldBit;
type SGpioIdrIdr0: RegField<Srt, Reg = Self::SGpioIdr, URegField = Self::UGpioIdrIdr0, SRegField = Self::SGpioIdrIdr0, CRegField = Self::CGpioIdrIdr0> + SRoRoRegFieldBit;
type CGpioIdrIdr0: RegField<Crt, Reg = Self::CGpioIdr, URegField = Self::UGpioIdrIdr0, SRegField = Self::SGpioIdrIdr0, CRegField = Self::CGpioIdrIdr0> + CRoRoRegFieldBit;
}