[][src]Trait drone_stm32_map_periph_uart::UartCr1Uesm

pub trait UartCr1Uesm<T: UartMap>: UartCr1<T> {
    type UUartCr1Uesm: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + URwRwRegFieldBitBand;
    type SUartCr1Uesm: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + SRwRwRegFieldBitBand;
    type CUartCr1Uesm: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + CRwRwRegFieldBitBand;
}

Associated Types

type UUartCr1Uesm: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + URwRwRegFieldBitBand

type SUartCr1Uesm: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + SRwRwRegFieldBitBand

type CUartCr1Uesm: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1Uesm, SRegField = Self::SUartCr1Uesm, CRegField = Self::CUartCr1Uesm> + CRwRwRegFieldBitBand

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Implementors

impl UartCr1Uesm<Lpuart1> for Lpuart1[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

impl UartCr1Uesm<Uart4> for Uart4[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

impl UartCr1Uesm<Uart5> for Uart5[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

impl UartCr1Uesm<Usart1> for Usart1[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

impl UartCr1Uesm<Usart2> for Usart2[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

impl UartCr1Uesm<Usart3> for Usart3[src]

type UUartCr1Uesm = Uesm<Urt>

type SUartCr1Uesm = Uesm<Srt>

type CUartCr1Uesm = Uesm<Crt>

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