[][src]Trait drone_stm32_map_periph_uart::UartCr1Peie

pub trait UartCr1Peie<T: UartMap>: UartCr1<T> {
    type UUartCr1Peie: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + URwRwRegFieldBitBand;
    type SUartCr1Peie: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + SRwRwRegFieldBitBand;
    type CUartCr1Peie: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + CRwRwRegFieldBitBand;
}

Associated Types

type UUartCr1Peie: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + URwRwRegFieldBitBand

type SUartCr1Peie: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + SRwRwRegFieldBitBand

type CUartCr1Peie: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1Peie, SRegField = Self::SUartCr1Peie, CRegField = Self::CUartCr1Peie> + CRwRwRegFieldBitBand

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Implementors

impl UartCr1Peie<Lpuart1> for Lpuart1[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

impl UartCr1Peie<Uart4> for Uart4[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

impl UartCr1Peie<Uart5> for Uart5[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

impl UartCr1Peie<Usart1> for Usart1[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

impl UartCr1Peie<Usart2> for Usart2[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

impl UartCr1Peie<Usart3> for Usart3[src]

type UUartCr1Peie = Peie<Urt>

type SUartCr1Peie = Peie<Srt>

type CUartCr1Peie = Peie<Crt>

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