[−][src]Trait drone_stm32_map_periph_uart::UartCr1M1

pub trait UartCr1M1<T: UartMap>: UartCr1<T> {
    type UUartCr1M1: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + URwRwRegFieldBitBand;
    type SUartCr1M1: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + SRwRwRegFieldBitBand;
    type CUartCr1M1: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + CRwRwRegFieldBitBand;
}

Associated Types

type UUartCr1M1: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + URwRwRegFieldBitBand

type SUartCr1M1: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + SRwRwRegFieldBitBand

type CUartCr1M1: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1M1, SRegField = Self::SUartCr1M1, CRegField = Self::CUartCr1M1> + CRwRwRegFieldBitBand

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Implementors

impl UartCr1M1<Lpuart1> for Lpuart1[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

impl UartCr1M1<Uart4> for Uart4[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

impl UartCr1M1<Uart5> for Uart5[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

impl UartCr1M1<Usart1> for Usart1[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

impl UartCr1M1<Usart2> for Usart2[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

impl UartCr1M1<Usart3> for Usart3[src]

type UUartCr1M1 = M1<Urt>

type SUartCr1M1 = M1<Srt>

type CUartCr1M1 = M1<Crt>

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