type UUartCr1Idleie: RegField<Urt, Reg = Self::UUartCr1, URegField = Self::UUartCr1Idleie, SRegField = Self::SUartCr1Idleie, CRegField = Self::CUartCr1Idleie> + URwRwRegFieldBitBand
type SUartCr1Idleie: RegField<Srt, Reg = Self::SUartCr1, URegField = Self::UUartCr1Idleie, SRegField = Self::SUartCr1Idleie, CRegField = Self::CUartCr1Idleie> + SRwRwRegFieldBitBand
type CUartCr1Idleie: RegField<Crt, Reg = Self::CUartCr1, URegField = Self::UUartCr1Idleie, SRegField = Self::SUartCr1Idleie, CRegField = Self::CUartCr1Idleie> + CRwRwRegFieldBitBand
impl UartCr1Idleie<Lpuart1> for Lpuart1
[src]impl UartCr1Idleie<Uart4> for Uart4
[src]impl UartCr1Idleie<Uart5> for Uart5
[src]impl UartCr1Idleie<Usart1> for Usart1
[src]impl UartCr1Idleie<Usart2> for Usart2
[src]impl UartCr1Idleie<Usart3> for Usart3
[src]