[−][src]Trait drone_stm32_map_periph_gpio::GpioAfrlAfrl0

pub trait GpioAfrlAfrl0<T: GpioPortMap>: GpioAfrl<T> {
    type UGpioAfrlAfrl0: RegField<Urt, Reg = Self::UGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + URwRwRegFieldBits;
    type SGpioAfrlAfrl0: RegField<Srt, Reg = Self::SGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + SRwRwRegFieldBits;
    type CGpioAfrlAfrl0: RegField<Crt, Reg = Self::CGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + CRwRwRegFieldBits;
}

Associated Types

`type UGpioAfrlAfrl0: RegField<Urt, Reg = Self::UGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + URwRwRegFieldBits`

`type SGpioAfrlAfrl0: RegField<Srt, Reg = Self::SGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + SRwRwRegFieldBits`

`type CGpioAfrlAfrl0: RegField<Crt, Reg = Self::CGpioAfrl, URegField = Self::UGpioAfrlAfrl0, SRegField = Self::SGpioAfrlAfrl0, CRegField = Self::CGpioAfrlAfrl0> + CRwRwRegFieldBits`

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Implementors

`impl GpioAfrlAfrl0<GpioA> for GpioA`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioB> for GpioB`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioC> for GpioC`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioD> for GpioD`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioE> for GpioE`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioF> for GpioF`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioG> for GpioG`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioH> for GpioH`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

`impl GpioAfrlAfrl0<GpioI> for GpioI`[src]

`type UGpioAfrlAfrl0 = Afrl0<Urt>`

`type SGpioAfrlAfrl0 = Afrl0<Srt>`

`type CGpioAfrlAfrl0 = Afrl0<Crt>`

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