[−][src]Trait drone_stm32_map_periph_gpio::GpioAfrhAfrh9

pub trait GpioAfrhAfrh9<T: GpioPortMap>: GpioAfrh<T> {
    type UGpioAfrhAfrh9: RegField<Urt, Reg = Self::UGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + URwRwRegFieldBits;
    type SGpioAfrhAfrh9: RegField<Srt, Reg = Self::SGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + SRwRwRegFieldBits;
    type CGpioAfrhAfrh9: RegField<Crt, Reg = Self::CGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + CRwRwRegFieldBits;
}

Associated Types

`type UGpioAfrhAfrh9: RegField<Urt, Reg = Self::UGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + URwRwRegFieldBits`

`type SGpioAfrhAfrh9: RegField<Srt, Reg = Self::SGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + SRwRwRegFieldBits`

`type CGpioAfrhAfrh9: RegField<Crt, Reg = Self::CGpioAfrh, URegField = Self::UGpioAfrhAfrh9, SRegField = Self::SGpioAfrhAfrh9, CRegField = Self::CGpioAfrhAfrh9> + CRwRwRegFieldBits`

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Implementors

`impl GpioAfrhAfrh9<GpioA> for GpioA`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioB> for GpioB`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioC> for GpioC`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioD> for GpioD`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioE> for GpioE`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioF> for GpioF`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioG> for GpioG`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioH> for GpioH`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

`impl GpioAfrhAfrh9<GpioI> for GpioI`[src]

`type UGpioAfrhAfrh9 = Afrh9<Urt>`

`type SGpioAfrhAfrh9 = Afrh9<Srt>`

`type CGpioAfrhAfrh9 = Afrh9<Crt>`

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