type URccBussmenrDmasmen: RegField<Urt, Reg = Self::URccBussmenr, URegField = Self::URccBussmenrDmasmen, SRegField = Self::SRccBussmenrDmasmen, CRegField = Self::CRccBussmenrDmasmen> + URwRwRegFieldBitBand
type SRccBussmenrDmasmen: RegField<Srt, Reg = Self::SRccBussmenr, URegField = Self::URccBussmenrDmasmen, SRegField = Self::SRccBussmenrDmasmen, CRegField = Self::CRccBussmenrDmasmen> + SRwRwRegFieldBitBand
type CRccBussmenrDmasmen: RegField<Crt, Reg = Self::CRccBussmenr, URegField = Self::URccBussmenrDmasmen, SRegField = Self::SRccBussmenrDmasmen, CRegField = Self::CRccBussmenrDmasmen> + CRwRwRegFieldBitBand
impl RccBussmenrDmasmen for Dma1
[src]type URccBussmenrDmasmen = Dma1Smen<Urt>
type SRccBussmenrDmasmen = Dma1Smen<Srt>
type CRccBussmenrDmasmen = Dma1Smen<Crt>
impl RccBussmenrDmasmen for Dma2
[src]type URccBussmenrDmasmen = Dma2Smen<Urt>
type SRccBussmenrDmasmen = Dma2Smen<Srt>
type CRccBussmenrDmasmen = Dma2Smen<Crt>