Struct drone_cortexm::map::reg::itm::tcr::Hold

pub struct Hold<'a, _T: RegTag> { /* fields omitted */ }

Trace Control Register.

Implementations

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn busy(&self) -> bool

Indicates whether the ITM is currently processing events.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn trace_bus_id(&self) -> u32

Identifier for multi-source trace stream formatting.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn write_trace_bus_id(&mut self, bits: u32) -> &mut Self

Identifier for multi-source trace stream formatting.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn gtsfreq(&self) -> u32

Global timestamp frequency.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn write_gtsfreq(&mut self, bits: u32) -> &mut Self

Global timestamp frequency.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn ts_prescale(&self) -> u32

Local timestamp prescaler, used with the trace packet reference clock.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn write_ts_prescale(&mut self, bits: u32) -> &mut Self

Local timestamp prescaler, used with the trace packet reference clock.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn swoena(&self) -> bool

Enables asynchronous clocking of the timestamp counter.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn set_swoena(&mut self) -> &mut Self

Enables asynchronous clocking of the timestamp counter.

pub fn clear_swoena(&mut self) -> &mut Self

Enables asynchronous clocking of the timestamp counter.

pub fn toggle_swoena(&mut self) -> &mut Self

Enables asynchronous clocking of the timestamp counter.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn txena(&self) -> bool

Enables forwarding of hardware event packet from the DWT unit to the ITM for output to the TPIU.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn set_txena(&mut self) -> &mut Self

Enables forwarding of hardware event packet from the DWT unit to the ITM for output to the TPIU.

pub fn clear_txena(&mut self) -> &mut Self

Enables forwarding of hardware event packet from the DWT unit to the ITM for output to the TPIU.

pub fn toggle_txena(&mut self) -> &mut Self

Enables forwarding of hardware event packet from the DWT unit to the ITM for output to the TPIU.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn syncena(&self) -> bool

Enables Synchronization packet transmission for a synchronous TPIU.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn set_syncena(&mut self) -> &mut Self

Enables Synchronization packet transmission for a synchronous TPIU.

pub fn clear_syncena(&mut self) -> &mut Self

Enables Synchronization packet transmission for a synchronous TPIU.

pub fn toggle_syncena(&mut self) -> &mut Self

Enables Synchronization packet transmission for a synchronous TPIU.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn tsena(&self) -> bool

Enables Local timestamp generation.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn set_tsena(&mut self) -> &mut Self

Enables Local timestamp generation.

pub fn clear_tsena(&mut self) -> &mut Self

Enables Local timestamp generation.

pub fn toggle_tsena(&mut self) -> &mut Self

Enables Local timestamp generation.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn itmena(&self) -> bool

Enables the ITM.

impl<'a, _T: RegTag> Hold<'a, _T>

pub fn set_itmena(&mut self) -> &mut Self

Enables the ITM.

pub fn clear_itmena(&mut self) -> &mut Self

Enables the ITM.

pub fn toggle_itmena(&mut self) -> &mut Self

Enables the ITM.

Trait Implementations

impl<'a, _T> RegHold<'a, _T, Reg<_T>> for Hold<'a, _T> where
    _T: RegTag, 

fn val(&self) -> Val

Returns the opaque value.

fn set_val(&mut self, val: Val)

Replaces the opaque value.